Index
IN-10 Computer Group Literature Center Web Site
I
N
D
E
X
tick timer
interrupters 2-19
periodic interrupt example B-1
Tick Timer 1 and 2
Compare and Counter Registers 3-15
Control Registers 3-18
Tick Timer 1
Compare Register 2-69, 3-16
Control Register 2-74, 3-19
Counter 2-69, 3-16
Interrupt Control Register 3-21
Tick Timer 2
Compare Register 2-70, 3-16
Control Register 2-73, 3-19
Counter 2-70, 3-17
Interrupt Control Register 3-20
Tick Timer 3 and 4
Compare and Counter Registers 3-37
Control Registers 3-24
Tick Timer 3
Compare Register 3-37
Control Register 3-24
Counter 3-37
Interrupt Control Register 3-20
Tick Timer 4
Compare Register 3-38
Control Register 3-24
Counter 3-38
Interrupt Control Register 3-20
Tick Timer Interrupt Control Registers 3-20
tick timers 1-3, 3-7
VMEchip2 2-14
time off /time on timers, DMAC 2-66
time-of-day clock 1-3
memory map 1-40, 1-42
time-out
local bus 1-48
period 2-17
VMEbus access 1-49
time-out period, watchdog 2-67
timers 1-3
timers, VMEbus 2-7
transfer mode, VMEbus 2-12
Transfer Type (TT) signals 1-9
transition boards 1-2
triple (or greater) bit error
(cycle type = burst read or non-burst
read) 5-6
(cycle type = non-burst write) 5-6
(cycle type = scrub) 5-7
V
V11 control bit, MC2 chip 1-11, 3-34
Vector Base Register 2-96
Vector Base Register, IP2 chip 4-18
vector base registers 2-75
VME Access, Local Bus, and Watchdog
Time-out Control Register 2-67
VME LED 2-100
VMEbus access
time-out 1-49
time-out value 2-67
VMEbus
address counter, DMAC 2-60
Arbiter Time-out Control Register 2-65
BBSY* 2-99
BERR* 1-49
capabilities 2-4, 2-9, 2-11
global time-out timer 2-66
interface 1-4
Interface, "no" option 1-5
VMEbus interrupter
acknowledge interrupter 2-19
Control Register 2-61
programming 2-52
Vector Register 2-63
VMEchip2 2-16
VMEbus
IRQ1, IRQ2 interrupt 2-96
mapping 1-46
maps, creating 2-6
master 2-6
request 2-56
request level 2-55
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