Motorola MSC8101 ADS User's Guide Page 53

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MSC8101 User’s Guide 2-1
Chapter 2
Reset Configuration and Boot
This chapter describes the MSC8101 reset and boot process illustrated with examples of
different system configurations. It also describes the device clocking system, as it pertains
to the reset and boot process. The MSC8101 communicates with other devices in a system
either through the PowerPC system bus or the host port (HDI16). The chosen f
communication mode defines the reset configuration and the boot method.
2.1 Reset Configuration and Boot Basics
Reset configuration sets the basic mode of operation for the MSC8101, including the
operating frequency, arbitration, boot port size, memory controller functionality, and bus
behavior. These are the minimal parameters that must be set for correct operation. The
system configuration (memory controller, system protection logic, interrupt controller,
parallel I/O, and clocks) do not change. There are three kinds of reset in the MSC8101
system:
Soft reset. Invoked externally by asserting the SRESET signal or internally by
events. The soft reset initializes the core and internal logic, but system
configuration and clocks do not change.
Hard reset. Invoked externally by asserting the HRESET signal or internally by
events. The hard reset initializes the core internal logic and system configuration.
The phased-lock loop (PLL) and delay-lock loop (DLL) are not affected.
Power-on reset. Invoked only externally by asserting the PORESET signal.
Power-on reset initializes the core internal logic, the system configuration, and the
clocks. Asserting
PORESET input also asserts the HRESET and SRESET signals
internally. During power-on reset, several configuration pins are sampled to set the
boot mode, the source of the reset configuration values, and the basic clocking
mode. The configuration pins are sampled at the rising edge of
PORESET, and then
the reset configuration process starts. During reset configuration, a reset
configuration word that determines basic parameter settings is written to the
MSC8101, and a PLL and DLL locking process starts. The
HRESET and SRESET
pins remain asserted for a time after the PLL and DLL locking.
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