Architecture
MSC8101 Overview 1-13
1.3.7.3 Buffer Descriptors
If you are programming the CPM serial controllers, you need to know how the serial
controllers use buffer descriptors to define buffer allocation. A buffer descriptor (BD)
contains the essential information about each buffer in memory. Each buffer is referenced
by a BD that can reside anywhere in dual-port RAM. These BDs are shared among all
serial controllers, including:
■ SCCs in UART, HDLC, BISYNC, Transparent, Ethernet, and AppleTalk modes
■ FCCs in HDLC, Fast Ethernet, and Transparent modes
■ SMCs in UART, Transparent, and GCI modes
■ MCCs in HDLC and Transparent modes
■ SPI
■ I
2
C
Each 64-bit BD has the structure shown in Figure 1-2. This structure is common to all
communications controllers. A receive buffer descriptor (RxBD) table and a transmit
buffer descriptor (TxBD) table are associated with each serial controller. Each table can
have multiple BDs.
In this discussion, the BD and field values use the following convention:
BD.field
Table 1-3 shows the possible BD and field naming conventions. Bit names in
RxBD.bd_cstat and TxBD.bd_cstat use the following convention:
Offset 0123456789101112131415
0x0 Status and Control
0x2 Data Length
0x4 High-Order Buffer Pointer
0x6 Low-Order Buffer Pointer
Figure 1-2. Buffer Descriptor Structure
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