Motorola ColdFire MCF5281 User Manual

This document identifies implementation differences between the MCF5281/82 processors and the descriptioncontained in the MCF5282 ColdFire® Reference

Workaround:Do not write to the control/status word after initializing a receive MB. If a write (deactivation) isrequired to the control/status field o

Affects:PLLDescription:During a power on reset, if the CLKMOD[1:0] equals 11 (normal PLL mode with crystalreference), the PLL does not lock and the de

Workaround Step 2b (Select one of the step 2 options to use): Separate the contents ofthe SRAM and the flash memory into exclusive categories and use

Document Number: MCF5282DERev. 8, 02/2015Information in this document is provided solely to enable system and software implementers to use Freescale p

Table 1. Summary of MCF5281/82 Errata (continued)Errata Module Affected Date ErrataAddedDate Code Affected?<XXX0324 XXX0324 toXXX0326>XXX0326SEC

SECF035: Leakage Current on VDDPLL pinErrata type:SiliconAffects:PLLDescription:The device exhibits a 65mA leakage current on the VDDPLL supply, regar

should not experience any stall because that accumulator is not being updated. In the currentV2 + EMAC implementation, it incorrectly stalls for two c

If a write to the CACR is performed to clear the cache (CACR[CINV] = 1) and only a partialclear is done (CACR[INVI] or CACR[INVD] set), then cache cor

up to four lines after the end of the valid data can also be written. In most cases, this is not aproblem because the extra lines of data continue fal

When TCP is used as a transport mechanism, this errata manifests itself as lost packets andreduced throughput. Data continues to be received correctly

Description:A CCW table location may be corrupted by writing any other CCW or results table locationwhile any queue is active. If a CCW table or resul

Workaround:Use bypass mode, by setting CLKMOD[1:0] to 00. The CLKOUT to CLKIN phase relationshipis maintained.Fix plan:Currently, there are no plans t