Motorola M68CPU32BUG User Manual Page 4

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MOTOROLA MC68332TUT/D
4
74HC244s are enabled. Otherwise, if an external RESET signal was applied during a write to external mem-
ory and was not conditioned with R/W and DS, the 74HC244s would turn on during the write and cause data
bus contention.
Figure 1 Circuitry to Drive Data Bus Pins During RESET Assertion
There are several alternative methods of driving data bus pins low during reset. The easiest methods are
to connect a resistor in series with a diode from the data bus pin to the RESET line or to connect a transistor,
as shown in
Figure 2
. When using a bipolar transistor, a base current limiting resistor is required. When
using field effect transistor, a base limiting resistor is not needed. However, the best method is to use the
configuration shown in
Figure 1
.
Figure 2 Alternate Methods of Conditioning Data Bus Pins
2.2 Choosing Memory Width
One decision that must be made early in the design is the width of memory to be used. Systems with 8-bit
wide memory, 16-bit wide memory or a combination of the two can be implemented using only the onboard
chip-select lines.
D15
D8
D7
D0
74HC244
74HC244
RESET DS R/W
OE
OE
IN1
IN8
OUT1
OUT8
IN1
IN8
OUT1
OUT8
820
10K 10K
+5V
+5V +5V
MC68332
332TUT DAT PIN RESET
TIE INPUTS
HI OR LO
AS NEEDED
TIE INPUTS
HI OR LO
AS NEEDED
332TUT DAT RESET HOLD
1K 1N4148
DATA PIN
RESET
2K
DATA PIN
RESET
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