Motorola M68CPU32BUG User Manual download pdf (Page 21)

MC68332TUT/D MOTOROLA

2.9.3.1 How to Construct Word Memory from Two Byte Memories

For chip-select signals other than CSBOOT, forming word memory that is byte-accessible from two byte-

wide devices is simple. Use a separate chip-select pin for each device, and configure chip-select logic to

decode the upper and lower bytes, respectively. Each of the chip-select circuits must be configured as a 16-

bit port, even though only eight bits of memory are being accessed.This allows both byte and word writes—

if both memories were connected to the same chip-select line, byte writes would corrupt the adjacent byte.

This function can also be implemented in external logic by gating a single chip-select line with the MCU

ADDR0 line to select upper and lower bytes. For ROM memory a single-chip-select can be used to enable

both byte-wide ROMs, as the MCU uses only the required byte on the data bus during a byte read and ig-

nores the remaining byte.

Figure 14 illustrates how to connect two 8-bit memories as one16-bit port. It also shows the connections

necessary for a 16-bit memory. In this example configuration, CS0

is connected to the chip enable pin CE

of the first RAM chip and CS1 is connected to the chip enable pin of the second RAM chip. This effectively

makes CS0 the upper byte enable and CS1 the lower byte enable. The R/W line of the MCU is connected

to the R/W lines of both RAM chips. CSBOOT is connected to the ROM enable. ADDR[13:1] of the MCU

are connected to address lines [12:0] of each RAM chip, and ADDR[16:1] of the MCU are connected to ad-

dress lines [15:0] of the ROM.

Figure 14 Configuring 16-Bit Memory with 8-Bit RAMs — Common R/W Input

Another common configuration is shown in Figure 15. Here, the chip enables (CE) are always asserted, the

write enable (WE) for upper byte access is connected to CSO, the write enable for lower byte access is con-

nected to CS1, and the read enable (OE) for both upper and lower byte accesses are connected to CS2.

See 4.2.10 Example of SIM Initialization for software to initialize this example system.

332TUT EXT MEM CONN 2

MCU

ROM ENABLE

ADDR[16:1]

DATA

RAM

32K X 8

ROM

32K X 16

ADDR[13:1]

R/W

DATA[7:0]

DATA[15:0]

ADDR

DATA

ADDR

DATA

RAM

32K X 8

ADDR[13:1]

R/W

DATA[15:8]

ADDR

LOWER BYTE ENABLE

UPPER BYTE ENABLE

ADDR[16:0]

DATA[15:0]

R/W

CSO

CSBOOT

CS1

1 2 ... 16 17 18 19 20 21 22 23 24 25 26 ... 55 56

Comments to this Manuals

No comments

Motorola M68CPU32BUG User Manual Page 21

Comments to this Manuals