Motorola M68CPU32BUG User Manual download pdf (Page 27)

MC68332TUT/D MOTOROLA

Only ten pins on the board, a special cable, and software are needed to debug. The M68ICD32 cable has

a 10-pin female connector on one end and a PAL with a 25-pin connector on the other end. The 10-pin con-

nector will plug directly into a male header or connector with the layout shown in Figure 17. The PAL end

of the cable plugs into the parallel port of a PC. The PC runs the debugger software that controls the MCU

in BDM.

3.1.2.2 How BDM Works

The debugger causes the MCU to enter debugging mode by driving the BKPT pin low at the release of the

RESET signal. Reset causes the MCU to fetch the reset exception vectors, load the program counter and

stack pointer, then fetch the first instruction pointed to. Since the SRAM module is disabled out of reset,

reset vector fetches are made from external memory enabled by the CSBOOT

signal. If the CSBOOT chip-

select circuit is configured to enable a 16-bit port (DATA0 = 1 at release of RESET), the first word of the

instruction is fetched, however, if the CSBOOT chip-select circuit is configured to enable an 8-bit port

(DATA0 held low at the release of RESET), the MCU fetches the first byte of the instruction. The MCU then

enters BDM.

At this point the debugger causes the MCU to fetch several instructions, which are displayed in the debug-

ger window on the computer screen. If valid stack pointer and program counter values are present, and a

valid program is resident at the address pointed to by the initial PC value, the debugger will display the code

beginning at the program counter address.

If the initial stack pointer and program counter values are not valid, however, or if the external memory is

either not connected or uninitialized when the fetches are made, it is very likely that the initial SP and PC

values will be $FFFFFFF. CSBOOT is the only chip-select circuit that is active out of reset, and it enables

only the first 1 Mbyte of memory — when the first instruction fetches are made at $FFFFFF, there will be

nothing to generate DSACK and terminate the bus cycle, and the debugger software will force a bus error.

Should this occur, the debugger generally displays a series of “Memory implementation error: debugger

supplied DSACK” messages on the computer screen. After the debugger software has finished making the

scheduled number of program fetches, the error messages will stop, and the MCU will be in BDM waiting

for the next debugger command. However, additional errors will occur if the next command is an external

memory access because the program counter and stack pointer values are invalid.

When using a software background mode debugger to boot an MCU from external RAM or uninitialized

ROM, it is imperative that the following actions be taken immediately after starting the debugger:

1. Load a value into address register A7 to serve as a stack pointer value. It must point to a modifiable

memory address.

2. Load the address of the first instruction to be executed into the program counter.

Table 4 BDM Connections

10-Pin Connector 8-Pin Connector Signal Use

1 ---- D

Data Strobe

2 ---- BERR

Output from ICD to BERR input

3 1 GND

Ground Reference

4 2 BKPT

/DSCLK

Output from ICD to BKPT

input; assertion causes MCU to

first enable and then enter background mode. Once in

BDM, this pin becomes the serial clock.

5 3 GND

Ground Reference

6 4 FREEZE

Output from MCU indicating whether it is operating normal-

ly or is in BDM

7 5 RESET

Device reset

8 6 IFETCH

/DSI

Serial input data to the MCU in BDM

9 7 VDD

Device Operating Voltage

10 8 IPIPE

/DSO

Serial output data from the MCU in BDM

1 2 ... 22 23 24 25 26 27 28 29 30 31 32 ... 55 56

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Motorola M68CPU32BUG User Manual Page 27

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