Motorola MVME712A/D3 User Manual Page 66

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Test Descriptions
3-22 167Bug Debugging Package UserÕs Manual
3
Prescaler Clock Adjust - ADJ
Verifies that the Prescaler Clock Adjust Register can vary the period of the Tick
Timer input clock. This is accomplished by setting the Clock Adjust Register
to zero and allowing Tick Timer 1 to free-run for a small software delay, this
will establish a reference count. Next a 1 is walked through the Clock Adjust
Register and the timer is allowed to run for the same delay period, the
resulting count should be greater than the last count.
Higher level software will always initialize the prescaler prior to calling the
test, so a check of the register with a result of zero will be treated as a failure.
Command Input:
167-Diag>PCC2 ADJ
Response/Messages:
After the command has been issued, the following line is printed:
PCC2 ADJ: Prescaler Clock Adjust............ Running --->
If all parts of the test are completed correctly, then the test passes.
PCC2 ADJ: Prescaler Clock Adjust............ Running ---> PASSED
If any part of the test fails, then the display appears as follows:
PCC2 ADJ: Prescaler Clock Adjust............ Running ---> FAILED
PCC2/ADJ Test Failure Data:
(error message)
Here, (error message) is one of the following:
Prescaler Clock Adjust Register not initialized
Register ________, should not be zero
Clock Adjust did not vary tick period correctly
Register Address =________, Adjust value =__
Test count : ________, should be greater than
Previous count: ________
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