Motorola MVME712A/D3 User Manual download pdf (Page 181)

LAN Coprocessor for Ethernet (LANC) Tests

MVME167BUG/D3 3-137

Diagnose Internal Hardware - DIAG

This test verifies that the Diagnose command of the 82596 can be executed, and

that an error-free completion status is returned. The Diagnose command

triggers an internal self-test procedure that checks the 82596 hardware, which

includes the following:

❏ Exponential Backoff Random Number Generator

(Linear Feedback Shift Register).

❏ Exponential Backoff Timeout Counter

❏ Slot Time Period Counter

❏ Collision Number Counter

❏ Exponential Backoff Shift Register

❏ Exponential Backoff Mask Logic

❏ Timer Trigger Logic

The Channel Interface Module of the 82596 performs the self-test procedure in

two phases: Phase 1 tests the counters and Phase 2 tests the trigger logic.

During Phase 1, the Linear Feedback Shift Register (LFSR) and the Exponential

Backoff Timer, Slot Timer, and Collision Counters are checked.

Phase 1:

1. All counters and shift registers are reset simultaneously.

2. Starts counting and shifting the registers.

3. The Exponential Backoff Shift Register reaches all ones.

4. Checks the Exponential Backoff Shift Register for all ones when the LFSR

content is all ones in its least signiÞcant bits.

5. Stops counting when the LFSR (30 bits) reaches a speciÞc state, and

Exponential Backoff Counter (10 bits) wraps from ÒAll OnesÓ to ÒAll

ZerosÓ. Simultaneously, the Slot Time counter switches from 01111111111

to 10000000000, and the collision counter (4 bits) wraps from ÒAll OnesÓ to

ÒAll ZerosÓ.

6. Phase 1 is successful if the 10 least signiÞcant bits (when applicable) of all

four counters are ÒAll ZerosÓ.

1 2 ... 176 177 178 179 180 181 182 183 184 185 186 ... 238 239

No comments

Motorola MVME712A/D3 User Manual Page 181