Motorola MVME712A/D3 User Manual Page 47

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Local RAM (RAM) and Static RAM (SRAM) Tests
MVME167BUG/D3 3-3
3
Memory Addressing - ADR
This is the memory addressability test, the purpose of which is to verify
addressing of memory in the range specified by the configuration parameters
for the RAM test group. Addressing errors are sought by using a memory
locations address as the data for that location. This test is coded to use only 32-
bit data entities. The test proceeds as follows:
1. A Locations Address is written to its location (n).
2. The next location (n+4) is written with its address complemented.
3. The next location (n+8) is written with the most signiÞcant (MS) 16 bits
and least signiÞcant (LS) 16 bits of its address swapped with each other.
4. Steps 1, 2, and 3 are repeated throughout the speciÞed memory range.
5. The memory is read and veriÞed for the correct data pattern(s) and any
errors are reported.
6. The test is repeated using the same algorithm as above (steps 1 through 5)
except that inverted data is used to insure that every data bit is written and
veriÞed at both "0" and "1".
Command Input:
167-Diag>RAM ADR
or:
167-Diag>SRAM ADR
Response/Messages:
Note that in all responses shown below, the response "RAM " is RAM or SRAM,
depending upon which test set is being performed. After the command has
been issued, the following line is printed:
RAM ADR: Addressability..................... Running --->
If all parts of the test are completed correctly, then the test passes.
RAM ADR: Addressability..................... Running ---> PASSED
If the test fails, then the display appears as follows.
RAM ADR: Addressability..................... Running ---> FAILED
Data Miscompare Error:
Address =________, Expected =________, Actual =________
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