Chapter 3 – Receiver Description
Motorola GPS Products - Oncore User’s Guide
Simplified Block
Diagram Description
OVERVIEW (CONTINUED)
The Oncore Receiver has an eight channel design (12-channel design for the
M12+) capable of tracking eight (twelve for M12+) satellites simultaneously. The
module receives the Ll GPS signal (1575.42 MHz) from the antenna and operates off
the coarse/acquisition (C/A) code tracking. The code tracking is carrier aided. The
Oncore receiver must be powered with regulated +5 V (Nominal 3V for M12+) power.
Time recovery capability is inherent in the architecture. The UT Oncore is designed
specifically for precise timing applications.
The Ll band signals transmitted from GPS satellites are collected by a low-profile,
microstrip patch antenna, passed through a narrow-band bandpass filter, and then
amplified by a signal preamplifier contained within the antenna module. Filtered and
amplified Ll band signals from the antenna module are then routed to the RF signal
processing section of the receiver module via a single coaxial interconnecting cable.
This interconnecting cable also provides the +5 V (Nominal 3V for M12+) power
required for signal pre-amplification in the antenna module.
The RF signal processing section of the Oncore receiver printed circuit board (PCB)
contains the required circuitry for down-converting the GPS signals received from
the antenna module. The resulting intermediate frequency (IF) signal is then passed
to the eight channel code and carrier correlator section of the Oncore receiver PCB
where a single, high speed analog-to-digital (AD) converter converts the IF signal to a
digital sequence prior to channel separation. This digitized IF signal is then routed to
the digital signal processor (also contained within the eight channel code and carrier
correlator section) where the signal is split into eight parallel channels for signal
detection, code correlation, carrier tracking, and filtering.
The processed signals are synchronously routed to the position microprocessor
(MPU) section. This section controls the GPS receiver operating modes and decodes
and processes satellite data and the pseudorange and delta range measurements
used to compute position, velocity, and time. In addition, the position processor
section contains the inverted TTL serial interface.
Warning
Keep-alive random access memory (RAM) is provided for the retention of satellite
ephemeris data, custom operating parameters, almanac information, and other
information, as specified in Chapter 5. To prevent loss of this information when the
Oncore receiver is powered off, an external +5 V (Nominal 3V for M12+) BATT
voltage is required. Retention of the real-time-clock (RTC) value also requires the
external +5 V (Nominal 3V for M12+) BATT signal when the Oncore receiver is
powered off.
Revision 5.0 08/30/02
3.5
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