Motorola MVME2400 Series Service Manual download pdf (Page 51)

ISA Local Resource Bus

http://www.mcg.mot.com/literature 1-31

NVRAM/RTC & Watchdog Timer Registers

The MK48T59/559 provides the MVME2400 series with 8K of non-

volatile SRAM, a time-of-day clock, and a watchdog timer. Accesses to

the MK48T59559 are accomplished via three registers: The

NVRAM/RTC Address Strobe 0 Register, the NVRAM/RTC Address

Strobe 1 Register, and the NVRAM/RTC Data Port Register. The

NVRAM/RTC Address Strobe 0 Register latches the lower 8 bits of the

address and the NVRAM/RTC Address Strobe 1 Register latches the upper

5 bits of the address.

The NVRAM and RTC is accessed through the above three registers.

When accessing a NVRAM/RTC location, follow the following

procedure:

1. Write the low address (A7-A0) of the NVRAM to the

NVRAM/RTC STB0 register,

2. Write the high address (A15-A8) of the NVRAM to the

NVRAM/RTC STB1 register, and

3. Then read or write the NVRAM/RTC Data Port.

Refer to the MK48T59 Data Sheet for additional details and programming

information.

VME Registers

The following registers provide the following functions for the VMEbus

interface: a software interrupt capability, a location monitor function, and

a geographical address status. For these registers to be accessible from the

VMEbus, the Universe II ASIC must be programmed to map the VMEbus

Table 1-16. MK48T59/559 Access Registers

PCI I/O Address Function

0000 0074 NVRAM/RTC Address Strobe 0 (A7 - A0)

0000 0075 NVRAM/RTC Address Strobe 1 (A15 - A8)

0000 0077 NVRAM/RTC Data Register

1 2 ... 46 47 48 49 50 51 52 53 54 55 56 ... 353 354

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Motorola MVME2400 Series Service Manual Page 51