CHAPTER 1 4
THE 68020
The MC68020 is a dramatically improved member of the 68000 family
with a plethora of new features. Not only is the basic core performance
of the processor much improved, but the new features expand the func
tionality of this chip so much that it brings it into serious competition
with mini- and super minicomputers. The major enhancements can be
summarized as:
1. A full 32-bit address bus
2. An instruction cache for faster execution
3. Built-in coprocessor support
4. New addressing modes
5. New and enhanced instructions
6. 8-, 16-, and 32-bit.data bus interface
The 68020 is a true 32-bit architecture. With the 32-bit data bus capa
bility and internal 32-bit operations, the 68020 can operate at its maximum
potential with 32-bit operands. Even though the 68000 performs 32-bit op
erations, the data bus path is restricted to 16 bits at a time. For this reason
the 68000 is sometimes classed as a 16-bit micro. The 68020 is clearly a
32-bit architecture in every way. In order to allow the 68020 to be used in
systems that are restricted to an 8- or 16-bit data bus, the 68020 provides
the option of using 8-, 16-, or 32-bit data bus widths. Unfortunately, you
can’t just plug in a 68020 where a 68000 was. The physical construction
is very different. The 68020 uses a 114-pin grid array, whereas the 68000
uses the more conventional dual in-line package (DIP).
Along with the expanded addressing capability comes an added
bonus: the restriction that word or longword data must be aligned on
even-byte boundaries is relaxed. Words and longwords can start on any
byte address. However, the restriction that instructions start on even bytes
has not been removed.
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