Motorola M68000 User's Guide Page 192

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178 Assembly Language Programming for the 68000 Family
instructions to be used in conjunction with the function class output lines.
A source function code register, SFC, and a destination function code
register, DFC, are available in the supervisor state. These registers are 3
bits each, each bit corresponding to a bit of the function class lines. A new
privileged instruction, the move to/from control register, is provided on
the 68010. Its general form is:
MOVEC Rc,Rn
MOVEC Rn,Rc
Rc = SFC, DFC, VBR, USP
Rn = D0-D7, A0-A7
It is always a 32-bit transfer, with unused bits read as zero. This instruction
can also be used to access the user stack pointer, USP, or the vector base
register, VBR (discussed below), or to set up the SFC or DFC with any
relevant value.
A second privileged instruction, move to/from address space, can now
be used to access the memory location in the address space specified
by the source or destination function registers. The general form of this
instruction is:
MOVESI.<size>] Rn,<ea>
MOVESI.<size>] <ea>,Rn
<size> = B, W, L
Rn = D0-D7, A0-A7
The SFC or DFC is used, as appropriate, depending on whether <ea>
is the source or destination of the instruction.
The Vector Base Register
You will recall from Chapter 12 that for the 68000 the exception
vectors start at memory location 016 and continue through 3FF10. This
is normally the case for the 68010 as well. However, the 68010 provides a
method of relocating the exception vectors to any place desired. A special
register, the vector base register, VBR, is provided for this purpose. This
32-bit register is initially set to zero upon a system reset. A program
running in the supervisor mode can change the contents of this register
by use of the MOVEC instruction described above. The contents of the
VBR is always added to the address that would normally be used to
process the exception. You may recall that this address is four times the
exception number. For example, the TRAP #0 instruction will generate
exception number 3210. The actual vector location will be at 12810 or 8016.
If the VBR contains 400016, the TRAP #0 exception vector is located at
408016. The following instructions can be used to set the VBR to 400016:
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