Motorola M68000 User's Guide Page 176

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162 Assembly Language Programming for the 68000 Family
1. Execution of the TRAP instruction will result in the CPU being
placed into supervisor mode.
2. By use of a vector number, rather than the specific address of the
operating system service, the actual address within the operating
system can change without the user reassembling his programs. The
operating system merely ensures that the proper address is placed
into the exception vector at the time the system starts up.
A special trap instruction, TRAPV, can be used to test the result of a
computation for an overflow condition. If the overflow condition is set,
the TRAPV instruction will cause an exception to vector number 7. If
we have an appropriate exception handler, this instruction is quite useful.
For example, if we perform an addition and then wish to trap on an
overflow, all we have to do is write the following instructions:
ADD.L DO fDl
TRAPV
Along the same line as the TRAPV instruction is the CHK (check
register against bounds) instruction:
CHK <ea>,Dn
The word in register Dn is first checked to see if it is below zero. If
it is, an exception is generated. If the word in Dn is zero or greater,
it is compared with the source operand. If it is greater than the source
operand, an exception is generated. The exception vector is number 6.
If the T bit in the status register is set to 1, we enter the trace mode. In
trace mode, every instruction generates an exception after it completes,
but before the next instruction begins. This is very useful for debugging a
program. In effect, we can single-step a program. Remember that the T
bit is reset before the exception handler gets control so that the handler
itself will not generate further exceptions. When the RTE is executed,
the T bit will assume its value before the exception, and execution will
continue with the next instruction in the program. The trace exception is
vector number 9.
Setting up an exception handler is quite simple. All that is needed is to
place its address in the appropriate exception vector location. However,
this requires access to the vector area of memory. Some systems restrict
access to this area in the user mode. In this case, we must somehow get
into supervisor mode. That means an exception of some sort. Usually an
operating system has a specific service that allows entry into supervisor
mode for a short time. If the operating system is very secure, or is
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