Motorola M68000 User's Guide Page 171

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Exception Processing, System Control Operations, and I/O 157
ANDI tXXX,CCR
EORI #xxx,CCR
ORI #XXX,CCR
Notice that the MOVE from SR instruction is used to examine the CCR.
With this exception, the instructions are all byte instructions.
Two other instructions involving the CCR not mentioned previously
should be examined. Return and restore condition codes, RTR, is similar
in operation to the RTS instruction except that the CCR is restored from
the stack prior to the return. In other words, the RTR instruction is
equivalent to
MOVE (SP)+,CCR
RTS
If the CCR is pushed onto the stack at the beginning of a subroutine
and the subroutine uses an RTR instead of an RTS, the subroutine will
not result in any changes to the CCR. This is a simple way to make a
subroutine transparent as far as the CCR is concerned.
The other instruction is actually a group of instructions. The See
instructions are similar to the group of conditional branches, Bcc. The
difference is that rather than conditionally branch, this instruction will
set its effective address to TRUE or FALSE depending on the particular
condition tested. TRUE and FALSE are defined as all ones for TRUE
and all zeros for FALSE. The effective address must always be a byte.
The following conditions can be tested:
CC
carry clear
LS
low or same
cs
carry set
LT
less than
EQ
equal
MI
minus
F
£alse
NE
notequal
GE
greater or equal
PL plus
GT
greater than
T
true
HI
high
vc
overflow clear
LE
less or equal
VS
overflow set
This instruction is especially useful for remembering the outcome of a
test without taking immediate action. For example, we might want to
remember if a calculation overflowed. We can set a flag byte OVFL
using the SVS instruction:
<perform calculation>
SVS OVFL SET FLAG BYTE
<do something else>
TST.B OVFL
BNE OVERFLOW
OVFLs DS.B 1
OVERFLOW FLAG BYTE
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