Motorola MSC8101 ADS User Manual download pdf (Page 9)

MOTOROLA MSC8101ADS RevB User’s Manual IX

LIST OF TABLES

TABLE 1-1. MSC8101ADS Specifications 12

TABLE 4-1. Available Clock Mode Setting 29

TABLE 4-2. JP1/JP2 Settings 31

TABLE 4-3. SIU Registers’ Programming 35

TABLE 4-4. Memory Controller Initialization for 100(50) MHz 36

TABLE 5-1 Summary Reset Configuration Schemes. 40

TABLE 5-2. Hard Reset Configuration Word 40

TABLE 5-3. MSC8101ADS Chip Select Assignments 44

TABLE 5-4. 100 MHz SDRAM Mode Register Programming 45

TABLE 5-5. Flash Memory Projected Performance Figures 46

TABLE 5-6. Ports Function Enable 49

TABLE 5-7. CS4221 Programming 51

TABLE 5-8. Host I/F Interconnect signals 54

TABLE 5-9. BCSR0 Description 55

TABLE 5-10. BCSR1 Description 56

TABLE 5-11. Peripheral’s Availability Decoding. 58

TABLE 5-12. BCSR2 Description 58

TABLE 5-13. Flash Presence Detect (7:5) Encoding 59

TABLE 5-14. Flash Presence Detect (4:1) Encoding 59

TABLE 5-15. BCSR3 Description 60

TABLE 5-16. EXTOOLI(0:3) Assignment 61

TABLE 5-17. External Tool Revision Encoding 61

TABLE 5-18. ADS Revision Encoding 61

TABLE 6-1. MSC8101ADS Memory Map 63

TABLE 7-1. Off-Board Application Maximum Current Consumption 66

TABLE A-1. MSC8101ADS Bill Of Material 68

TABLE B1-2. P1 - System Expansion - Interconnect Signals 77

TABLE B1-3. P2 - CPM Expansion - Interconnect Signals 82

TABLE B1-4. P3 - ISP Connector - Interconnect Signals 90

TABLE B1-5. P4 - Host Interface Connector - Interconnect Signals 90

TABLE B1-6. P6 - JTAG/ONCE Connector - Interconnect Signals 92

TABLE B1-7. P12 - Ethernet Port Interconnect Signals 93

TABLE B1-8. P17,P18 - T1/E1 Line Connectors Interconnect Signals 94

TABLE B1-9. P19,P21,P24 - Stereo Phone Connectors Interconnect Signals 94

TABLE B1-10. P27A Interconnect Signals 95

TABLE B1-11. P27B Interconnect Signals 95

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cale Semiconductor,

Freescale Semiconductor, Inc.

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