Motorola M68CPU32BUG User Manual Page 94
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USER CUSTOMIZATION
M68CPU32BUG REV 1 C-12
Table C-1. CPU32Bug Customization Area (continued)
Initialization Tables (continued)
This entry format aligns with the normal assembler output, as DC.W and DC.L are
automatically aligned on an an even address (word) boundary, as seen in the examples below.
Thus the <FILL> byte is handled automatically by the assembler.
Rel.
Addr Contents Label Opcode Operand Comment
0000 00FFFFA21 DC.L $FFFFA21 <ADDR>
0004 01 DC.B 1 1 BYTE
DATA
0005 04 DC.B $04 <DATA>
0006 00FFFFA21 DC.L $FFFFA21 <ADDR>
000A 31 DC.B $31 4 BYTE
DATA
000B 04 22 47 FE DC.B $04, $22, $47, $FE
Skips $1F-> 0010 00FFFFA22 DC.L $FFFFA22 <ADDR>
0014 02 DC.B 2 1 WORD
DATA
Skips $15-> 0016 0544 DC.W $0544 <DATA>
0018 00FFFFA74 DC.L $FFFFA74 <ADDR>
001C 04 DC.B 4 1 LONG
DATA
Skips $1D-> 001E 12345678 DC.L $12345678 <DATA>
0022 00FFFFA74 DC.L $FFFFA74 <ADDR>
0026 04 DC.B $14 2 LONG
DATA
Skips $27-> 0028 12345678 DC.L $12345678, $2307F
002C 0002307F
0030 FFFFFFFF DC.L $FFFFFFFF
Terminate
The routine will also terminate before any attempt is made to read table information past the
end of the table. Thus the user can completely fill the table without having to have a
termination entry whose <ADDR> equals FILL_L.
USER CUSTOMIZATION
M68CPU32BUG REV 1 C-13
Table C-1. CPU32Bug Customization Area (continued)
Offset Default Value Mnemonic Description
Sign On Text Message
$170-
1FF
SIGNON Text string in SYSCALL .WRITE format.
Default values shown in MASM assembly language format below except "^" has been
substituted for each space character (" ") to show exact spacing. The Motorola copyright must
be preserved.
SIGNON DC.B SIGN$2-SIGN$1 Char. count = $8F
SIGN$1 DC.B $0D,$0A,$0A CR,LF,LF
DC.B ’CPU32Bug^Debugger/Diagnostics^-^Version^^1.00’ =45 chars
DCB.B 34,$20 Pad to end of line; 79-45= 34.
DC.B $0D,$0A CR,LF
DC.B ’^(C)^Copyright,^1991^by^Motorola^Inc.’
DCB.B 23,$20 Reserve rest of space.
SIGN$2 EQU *
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
- M68CPU32BUG DEBUG MONITOR 1
- USER’S MANUAL 1
- M68CPU32BUG/D 1
- TABLE OF CONTENTS 2
- LIST OF FIGURES 3
- LIST OF TABLES 3
- 1.5 SYSTEM RESTART 5
- CHAPTER 1 5
- GENERAL INFORMATION 5
- 1.1 INTRODUCTION 5
- 1.2 GENERAL DESCRIPTION 5
- 1.3 USING THIS MANUAL 6
- 1.6 MEMORY REQUIREMENTS 7
- CHAPTER 2 9
- DEBUG MONITOR DESCRIPTION 9
- 2.1 INTRODUCTION 9
- Freescale Semiconductor, Inc 10
- 2.6 FUNCTION CODE SUPPORT 13
- CHAPTER 3 16
- DEBUG MONITOR COMMANDS 16
- 3.1 INTRODUCTION 16
- BC Block of Memory Compare BC 17
- BF Block of Memory Fill BF 17
- BS Block of Memory Search BS 19
- BM Block of Memory Move BM 19
- BR Breakpoint Insert BR 20
- BV Block of Memory Verify BV 21
- DU Dump S-Records DU 23
- DC Data Conversion DC 23
- GN Go To Next Instruction GN 25
- GO Go Execute User Program GO 27
- HE Help HE 29
- MA Macro Define/Display MA 31
- MAE Macro Edit MAE 33
- MM Memory Modify MM 35
- MD Memory Display MD 36
- MS Memory Set MS 38
- PF Port Format PF 39
- PA Printer Attached PA 40
- RD Register Display RD 41
- RS Register Set RS 43
- RESET Cold/Warm Reset RESET 44
- RM Register Modify RM 44
- T Trace T 45
- SD Switch Directories SD 45
- TM Transparent Mode TM 48
- 4.2SOURCE PROGRAM CODING 51
- CHAPTER 4 52
- ASSEMBLER/DISASSEMBLER 52
- 4.1 INTRODUCTION 52
- 5.2 SYSTEM CALL ROUTINES 57
- CHAPTER 5 58
- SYSTEM CALLS 58
- 5.1 INTRODUCTION 58
- .ERASLN Erase Line .ERASLN 61
- .OUTSTR .OUTSTR 66
- .SNDBRK Send Break .SNDBRK 68
- .TM_RD Read Timer .TM_RD 70
- .WRITELN .WRITELN 71
- .WRITDLN .WRITDLN 71
- 6.3 UTILITIES 73
- CHAPTER 6 73
- DIAGNOSTIC FIRMWARE GUIDE 73
- 6.1 INTRODUCTION 73
- 6.2 DIAGNOSTIC MONITOR 73
- CPU B Instruction Test CPU B 75
- CPU CPU Tests For The MCU CPU 76
- CPU A Register Test CPU A 76
- CPU C Address Mode Test CPU C 77
- MT Memory Tests MT 78
- MT D Set Bus Data Width MT D 79
- MT A Set Function Code MT A 79
- MT B Set Start Address MT B 80
- MT C Set Stop Address MT C 80
- MT H Random Byte Test MT H 81
- MT E March Address Test MT E 81
- MT F Walk a Bit Test MT F 82
- MT G Refresh Test MT G 82
- MT I Program Test MT I 83
- MT J Test and Set Test MT J 84
- BERR Bus Error Test BERR 84
- APPENDIX A 85
- S-RECORD INFORMATION 85
- A.1 INTRODUCTION 85
- A.2 S-RECORD CONTENT 85
- A.3 S-RECORD TYPES 86
- A.4 S-RECORDS CREATION 86
- C.2 CPU32BUG CUSTOMIZATION 87
- APPENDIX B 87
- SELF-TEST ERROR MESSAGES 87
- B.1 INTRODUCTION 87
- APPENDIX C 88
- USER CUSTOMIZATION 88
- C.1 INTRODUCTION 88
- C.3 CUSTOMIZATION TABLE 90
- C.4 COMMUNICATION FORMATS 93
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