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Program Control
Using the Stack Extension
MOTOROLA Optimizing DSP56300/DSP56600 Applications 3-9
Table 3-3. The use of SP bits for stack status when the stack
extension is disabled, instead of OMR for both cases, is for code
compatibility with the 56K family. The user’s stack error interrupt
routine should test the SEN bit (Stack Extension Enable) in OMR to
know what register to consult for stack status information.
Following is a full example of stack extension initialization.The
memory area allocated is in addresses Y:1024–1536 (512 locations).
This space can accommodate 256 stack locations in the stack
extension + fourteen locations in the hardware stack.
;========== initializing the stack extension ====================
;recommended only before interrupts are enabled
;care should be taken in cases where the code is used after
;a stack error event so that part of the initialization routine
;will clear sticky bits and resume the engine state to the
;reset initial state
EXTEN_START equ 1024 ;start address of stack
;extension in data area
MEM_SIZE equ 512 ;stack ext. size in data area
;maximum stack size (hardware +;extension),
;in units of two 24-bit words.
STACK_LIMIT equ MEM_SIZE/2+14
move #EXTEN_START,ep;set ext. pointer in data memory
move #STACK_LIMIT,sz;set stack limit
bset #M_XYS,omr ;select y space
bset #M_SEN,omr ;enable stack extension
Note: The stack extension was designed to operate transparently,
with no user software overhead. The mechanism ensures that
within stack size limit, data that is pushed into the stack will
be popped from the top of the stack in the same order. The
actual split of stack data between the hardware stack and the
stack extension is not readily apparent. The user therefore is
advised to access stacked data directly by software only
through the top of the stack.
Table 3-3 Stack Status Information
Stack
Extension
Status
Info.
Bit
Name
Function Comments
disabled
SEN = 0
SP SE Stack Error flag
All these bits
are sticky
UF Stack Underflow flag
enabled
SEN = 1
OMR WRP Extended Stack Wrap flag
EOV Extended Stack Overflow
EUN Extended Stack Underflow
- DSP56300/DSP56600 1
- Digital Signal 1
- Processors 1
- TABLE OF CONTENTS 2
- LIST OF FIGURES 6
- LIST OF TABLES 7
- INTRODUCTION 8
- 1.2 DSP56600 CORE FAMILY 9
- Table 1-1 11
- Introduction 12
- Description and Use 13
- Application Note Structure 14
- 1.4.3 Appendixes 15
- DATA OPERATIONS 16
- DSP56300 Family Manual 21
- 2.3 THE MAX INSTRUCTION 22
- 2.4 USING THE BARREL SHIFTER 23
- Data Operations 24
- Using the barrel shifter 24
- DSP56300 26
- DSP56600 Family 26
- Double precision arithmetic 27
- INSTRUCTIONS 28
- PROGRAM CONTROL 30
- Program Control 31
- Hardware Loops 31
- 3.2 THE HARDWARE STACK 32
- DSP56600 Family Manuals 35
- 3.3 USING THE STACK EXTENSION 36
- Using the Stack Extension 37
- EXTENSION 39
- Conditional DALU Instructions 40
- 3.6 PC RELATIVE INSTRUCTIONS 42
- DSP56600 Family Manual 43
- 3.7 USING FAST INTERRUPTS 46
- Using Fast Interrupts 48
- USING THE DMA 50
- Using the DMA 51
- Using Slow, Low-Cost Memories 54
- 4.4 SERVICING A PERIPHERAL 55
- Servicing a Peripheral 56
- Section 5 62
- 5.1 THE INSTRUCTION CACHE 62
- 5.1.1 Cache Sectors 64
- The Instruction Cache 65
- 5.1.3 Cache Burst Mode 67
- 5.2 MEMORY SWITCH 70
- Memory Switch 71
- 5.3 USING THE BOOTSTRAP ROM 72
- Using the Bootstrap ROM 73
- PIPELINE INTERLOCKS 74
- Pipeline Interlocks 75
- Data ALU Pipeline Interlocks 75
- DSP56000 Family Manual 76
- INTERLOCKS 80
- Interlocks 80
- 6.3 STACK EXTENSION DELAYS 81
- Interlocks? 83
- COMPACT OPCODE USE 86
- Instructions 87
- Compact Opcode Use 89
- Cycle Count of an Instruction 89
- 7.2 ADDRESSING MODES 90
- 7.2.2 Short Addressing Mode 91
- 7.2.3 Short Immediate Mode 91
- 7.2.5 Register Addressing 92
- 7.2.6 Word Count 92
- 7.3 PERIPHERAL ADDRESSING 92
- 7.4 SPECIAL INSTRUCTIONS 93
- 7.4.1 Dual Data Spaces 93
- 7.4.3 Clearing Registers 94
- Special Instructions 95
- SAVING POWER 96
- A.1.2 Stop Standby Mode 97
- A.1.3 Low-Power Clock Divider 97
- Saving Power 98
- Disabling Functional Blocks 98
- DEBUG AND TEST SUPPORT 100
- B.2 JTAG PORT FEATURES 101
- B.3 ADDRESS TRACING 102
- Debug and Test Support 103
- Address Tracing 103
- USING THE PROFILER 104
- C.3 THE PROFILING REPORT 105
- C.3.1 Basic Report 105
- C.3.2 Symbol Report 106
- Using the Profiler 107
- C.3.4 Code Coverage Report 108
- C.3.5 Basic Subroutine Report 109
- C.3.8 Subroutine Call Report 111
- C.4 USING THE PROFILE REPORT 111
- How to reach us: 112
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