Motorola MVME2300 Series User Manual download pdf (Page 156)

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Raven PCI Bridge ASIC

Interrupt Acknowledge Registers

On PowerPC-based systems, Interrupt Acknowledge is implemented as a

read request to a memory-mapped Interrupt Acknowledge register.

Reading the Interrupt Acknowledge register returns the interrupt vector

corresponding to the highest-priority pending interrupt. Reading this

❏ The associated bit in the Interrupt Pending register is cleared.

❏ Reading this register will update the In-Service register.

Reading this register without a pending interrupt will return a value of $FF

hexadecimal.

End-of-Interrupt Registers

EOI End Of Interrupt. There is one EOI register per

processor. EOI code values other than 0 are currently

undefined. Data values written to this register are ignored;

zero is assumed. Writing to this register signals the end of

Offset Processor 0 $200A0

Processor 1 $210A0

Bit 3

09876543210

Name VECTOR

Operation RRRR

Reset $00 $00 $00 $FF

Offset Processor 0 $200B0

Processor 1 $210B0

Bit 3

09876543210

Name EOI

Operation RRRRW

Reset $00 $00 $00 $0 $0

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Motorola MVME2300 Series User Manual Page 156