If fewer than eight pods are available for timing, the logic analyzer will
truncate the pods allocated. In this case, viewing the logic analyzer FORMAT
menu shows the pod allocations. If the allocations will not acquire the desired
signals, the allocations can be altered manually.
Timing
Configuration File (Timing)
Use configuration file C_33X_2T or
C_37X_2T for Timing analysis with the
HP 1671A/D logic analyzers.
Chapter 2: Hooking up Your System
To connect to the HP 1671A/D logic analyzer
2–22 E2480A Motorola CPU32 Preprocessor Interface
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