Motorola ColdFire MCF5282 User Manual download pdf (Page 21)

Chapter 1. M5282EVB 1-9

PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE

Support Logic

Watchdog Timer is disabled, the Bus Monitor is enabled, and the internal timers are placed in a stop

condition. A memory map for the entire board can be seen in Table 3-1.

If the external RCON pin is asserted (SW1-1 ON) during reset, then various chip functions,

including the reset configuration pin functions after reset, are configured according to the levels

driven onto the external data pins. See tables below on settings for reset configurations.

If the RCON pin is not asserted (SW1-1 OFF) during reset, the chip configuration and the reset

configuration pin functions after reset are determined by fixed defaults, regardless of the states of

the external data pins.

Table 1-4. SW1-1 RCON

SW1-1 Reset Configuration

OFF RCON not asserted, Default Chip configuration

ON RCON is asserted, Chip functions, including the are configured according to the

levels driven onto the external data pins.

Table 1-5. SW1-2 JTAG_EN

SW1-2 JTAG Enable

OFF JTAG interface enabled

ON BDM interface enabled

Table 1-6. SW1-[4:3] Encoded Clock Mode

SW1-3 SW1-4 RCON (SW1-1) Clock Mode

OFF OFF ON External clock mode- (PLL disabled)

OFF ON ON 1:1 PLL

ON OFF ON Normal PLL mode with external clock reference

ON ON ON Normal PLL mode w/crystal oscillator reference

X X OFF Normal PLL mode w/crystal oscillator reference

Table 1-7. SW1-[7:5] Chip Configuration Mode

SW1-5 SW1-6 SW1-7 RCON (SW1-1) Mode

OFF X X ON Reserved

ON OFF ON ON Reserved

ON OFF OFF ON Factory Test

ON ON OFF ON Single Chip

ON ON ON ON Master

XXXOFF Single Chip

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Motorola ColdFire MCF5282 User Manual Page 21