Motorola M68000 User Manual Page 226

  • Download
  • Add to my manuals
  • Print
  • Page
    / 357
  • Table of contents
  • BOOKMARKS
  • Rated. / 5. Based on customer reviews
Page view 225
Supervisor (Privileged) Instructions
MOTOROLA M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL 6-63
PTEST Test a Logical Address PTEST
(MC68030 only)
Operation: If Supervisor State
Then Logical Address Status MMUSR
Else TRAP
Assembler PTESTR FC, < ea > ,# < level >
Syntax: PTESTR FC, < ea > ,# < level > ,An
PTESTW FC, < ea > ,# < level >
PTESTW FC, < ea > ,# < level > ,An
Attributes: Unsized
Description: This instruction searches the address translation cache or the translation
tables to a specified level. Searching for the translation descriptor corresponding to the
< ea > field, it sets the bits of the MMU status register according to the status of the
descriptor. Optionally, PTEST stores the physical address of the last table entry
accessed during the search in the specified address register. The PTEST instruction
searches the address translation cache or the translation tables to obtain status
information, but alters neither the used or modified bits of the translation tables nor the
address translation cache. When the level operand is zero, only the transparent
translation of either read or write accesses causes the operations of the PTESTR and
PTESTW to return different results.
The < function code > operand is specified as one of the following:
1. Immediate—Three bits in the command word.
2. Data Register—The three least significant bits of the data register specified in
the instruction.
3. Source Function Code (SFC) Register
4. Destination Function Code (DFC) Register
The effective address is the address to test. The < level > operand specifies the level
of the search. Level 0 specifies searching the addrass translation cache only. Levels
1–7 specify searching the translation tables only. The search ends at the specified
level. A level 0 test does not return the same MMU status register values as a test at a
nonzero level number.
Execution of the instruction continues to the requested level or until detecting one of
the following conditions:
Invalid Descriptor
Limit Violation
Bus Error Assertion (Physical Bus Error)
Page view 225
1 2 ... 221 222 223 224 225 226 227 228 229 230 231 ... 356 357

Comments to this Manuals

No comments