Motorola P8190 Service Manual download pdf (Page 96)

Motorola Confidential Proprietary

TDMA Timeport™ P8190General Description

84

Call Processor (U1000)

U1000 is a single-chip microcontroller that

controls major functions of the cellular phone.

U1000 will perform the functions of both the

master controller and keyboard processor.

These functions include:

 Keypad interrupt and scanning

 Display driving

 Control of audio and RF hardware

 Call processing (signalling) software

- ON/OFF control

- EEPROM access

- Synthesizer programming

- Automatic Frequency Control(AFC)

- Transmit power setting

 User Interface

U1000 is not packaged with internal memo-

ries as past Call processors. This means that

vital information that was previously stored

in the memory of previous call pro-cessors is

now stored in the external EEPROM(U1003).

Call Processor(U1000)

Memory

A serial EEPROM(U1003) of 256K bytes is

used for storage of the NAM information,

authentication keys, phasing data, ESN, and

memory. The EEPROM serial interface to the

microcontroller is a standard SPI-compatible

interface.

U1300 is a 64K x 16 low voltage, low power

SRAM. U1300 uses a parallel interface bus.

U1200 is a 512K x 8 flash EPROM. U1200

uses a parallel interface bus.

Analog TX Audio Processing

The analog voice signal is taken from the

microphone and digitized by the CODEC

using an A/D converter. This block also con-

tains filtering to remove aliases before sam-

pling. The audio samples are then transmit-

ted to the DSP. The transmit audio func-

tions are located in a DSP.

The nominal TX Mic. Audio adjust amplifier

is realized in software.

The 300 Hz. high-pass filter is realized us-

ing four poles and four zeros of IIR digital

filtering. The 3 kHz. low-pass filter is real-

ized using four poles and four zeros of IIR

digital filtering.

The compressor is realized using a software

variable gain amplifier. The gain of the stage

is controlled by detecting the power at its

output and applying the result to control the

gain of the amplifier. The power detector is

realized using a full wave rectifier and one

pole and one zero of low-pass IIR digital fil-

tering.

The pre-emphasis filter is achieved using one

pole and one zero of IIR digital filtering. This

stage also incorporates an up-shelf filter

which is realized using one pole and one zero

of IIR digital filtering.

The deviation limiter is realized using an

amplifier in conjunction with a 7th-order odd

polynomial with two output comparators.

The amplifier is realized in software. The

7th-order odd polynomial minimizes the

amount of spectral splatter and is realized

in software. The comparators switch as the

signal reaches a high or low threshold, thus,

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