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MPC564EVB User’s Manual 1-11
Communication Ports
1.4 Communication Ports
The MPC564EVB provides external interfaces for 2 SCI serial ports, 3 CAN ports and a 10/100T
ethernet port.
1.4.1 COM1 and COM2
The MPC564 processor has one queued serial multi-channel module (QSMCM) which provides
two serial communications interfaces (SCI/UART). These submodules communicate with the CPU
via a common slave bus interface unit (SBIU). The signals of COM1 and COM2 pass through
external Driver/Receivers to make the channels RS-232 compatible. An RS-232 serial cable with
DB9 connectors is included with the board. The signals of both channels are available on the
QSM_PORT connector. SCI0 (COM-1) is the “TERMINAL” channel used by dBUG for
communication with an external terminal/PC. The “TERMINAL” baud rate defaults to 19200.
Notes:
1. COM ports provide connection pads 1 – 9 behind the DB9 cable connectors so the user
may modify operation of the serial connection. Each connection pad is numbered for the
associated serial connector pin. Each connection pad can be isolated from the others if
grouped above, by cutting the associated trace to the pad on the bottom side of the board.
See the MPC564EVB schematic.
2. COM-2 has the JP1 DCE/DTE option, see below.
3. RS232 translators available to COM3 and COM4 that are not required by user application
may be applied to other COM ports by isolating the MPC564 SCI signals to the RS232
transceiver and applying the associated RS232 level input or output to another COM port.
User should refer to the schematic diagrams of the board to make sure correct signals and
connections are isolated and reconnected for the new application.
S3 REGON MGPIO15 Open
S4 CANTXD B_CANTX0 A_CANTX0 Open
S5 CANRXD B_CANRX0 A_CANRX0 Open
S6 CS
QSPI_PCS1 Closed
S7 DO QSPI_MISO Closed
S8 DI QSPI_MOSI Closed
S9 VREF3 BOEPEE S10 Open
S10 VREF3 EPEE S9 Open
1
The MPC533/4 has limited or no functionality for this module. See Appendix A
Option
Designator
Power Oak Signal
MPC564 signal
Associated
Option
1
Default Connection
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
- MPC564EVB User’s Manual 1
- Cautionary Notes 4
- Contents 10
- Chapter 1 11
- Freescale Semiconductor, Inc 12
- 1.1 Processor 13
- 512 Kbytes 14
- 1.2.5 MPC564EVB Memory Map 15
- 1.2.2 SRAM 15
- 1.2.3 Internal SRAM 15
- 1.2.4 Internal Flash 15
- 1.3 Support Logic 18
- 1.3.4 Exception Sources 19
- 1.3.5 TA Generation 19
- 1.3.6 User’s Program 19
- MPC564 signal 20
- 1.4.2 CAN PORTs and Options 22
- 1.4.3 10/100T Ethernet Port 24
- MPC564 I/O SIGNAL 29
- 1.5.3 User Components 31
- 1.6 Reference Documents 38
- 1.7 Software Development 38
- 2.1 System Configuration 39
- 6 - 26 V 40
- Input Power 40
- RS-232 Terminal 40
- 2.2 Installation And Setup 41
- Power Port Connections 42
- +VIN DC supply 42
- GND +VIN VIGN 43
- (CONFIG_SW) 46
- Chapter 3 51
- 3.2 Operational Procedure 52
- 3.2.2 System Initialization 54
- 3.3 Command Line Usage 56
- 3.4 Commands 56
- ASM Assembler 58
- BC Block Compare 59
- BF Block Fill 60
- BM Block Move 61
- BR Breakpoints 62
- BS Block Search 63
- DC Data Conversion 64
- DI Disassemble 65
- DL Download Console 66
- DLDBUG Download dBUG 67
- DN Download Network 68
- FL Erase/Program Flash 69
- GO Execute 70
- GT Execute To 71
- HELP Help 72
- IRD Internal Register Display 73
- IRM Internal Register Modify 74
- LR Loop Read 75
- LW Loop Write 76
- MD Memory Display 77
- MM Memory Modify 78
- MMAP Memory Map Display 79
- RD Register Display 80
- RM Register Modify 81
- SET Set Configurations 83
- SHOW Show Configurations 84
- STEP Step Over 85
- SYMBOL Symbol Name Management 86
- TRACE Trace Into 87
- 3.5 System Call Functions 89
- 3.5.3 IN_STAT 90
- 3.5.4 ISR_REGISTER 90
- 3.5.5 ISR_REMOVE 90
- 3.5.6 EXIT_TO_dBUG 91
- Appendix A 93
- Appendix B 95
- Configuring dBUG for Network 95
- Downloads 95
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