Motorola CPU32 User Manual download pdf (Page 96)

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Instruction Set Summary

MOTOROLA M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL 3-25

3.5.2 Rounding the Result

The FPU supports the four rounding modes speciﬁed by the IEEE 754 standard. These

modes are round to nearest (RN), round toward zero (RZ), round toward plus inﬁnity (RP),

and round toward minus inﬁnity (RM). The RM and RP rounding modes are often referred

to as "directed rounding modes" and are useful in interval arithmetic. Rounding is

accomplished through the intermediate result. Single-precision results are rounded to a 24-

bit boundary; double-precision results are rounded to a 53-bit boundary; and extended-

precision results are rounded to a 64-bit boundary. Table 3-21 lists the encodings for the

FPCR that denote the rounding and precision modes.

Rounding the intermediate result’s mantissa to the speciﬁed precision and checking the 16-

bit intermediate exponent to ensure that it is within the representable range of the selected

rounding precision accomplishes range control. Range control is a method used to assure

correct emulation of a device that only supports single- or double- precision arithmetic. If the

intermediate result’s exponent exceeds the range of the selected precision, the exponent

value appropriate for an underﬂow or overﬂow is stored as the result in the 16-bit extended-

precision format exponent. For example, if the data format and rounding mode is single

precision RM and the result of an arithmetic operation overﬂows the magnitude of the single-

precision format, the largest normalized single-precision value is stored as an extended-

precision number in the destination ﬂoating-point data register (i.e., an unbiased 15-bit

exponent of $00FF and a mantissa of $FFFFFF0000000000). If an inﬁnity is the appropriate

result for an underﬂow or overﬂow, the inﬁnity value for the destination data format is stored

as the result (i.e., an exponent with the maximum value and a mantissa of zero).

Figure 3-2 illustrates the algorithm that the FPU uses to round an intermediate result to the

selected rounding precision and destination data format. If the destination is a ﬂoating-point

by the instruction itself determines the rounding boundary. For example, FSADD and

FDADD specify single- and double-precision rounding regardless of the precision speciﬁed

in the FPCR PREC status byte. If the destination is external memory or an integer data

of an operation is not exact, then the INEX2 bit is set in the FPSR EXC status byte.

Table 3-21. FPCR Encodings

Rounding Mode

(RND Field)

Encoding

Rounding Precision

(PREC Field)

To Nearest (RN) 0 0 Extend (X)

To Zero (RZ) 0 1 Single (S)

To Minus Infinity (RM) 1 0 Double (D)

To Plus Infinity (RP) 1 1 Undefined

1 2 ... 91 92 93 94 95 96 97 98 99 100 101 ... 645 646

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