Motorola MVME712AM Installation Guide download pdf (Page 18)

Board Level Hardware Description

1-2 Installation Guide

Overview

Each MVME197 module is a double-high VMEmodule based on the MC88110

RISC (Reduced Instruction Set Computer) microprocessor.

The MVME197DP/SP module series have 128/256MB of onboard DRAM with

programmable ECC (Error Checking and Correction), 256KB of external cache

memory for each MC88110/MC88410 microprocessor/cache controller

combination (note that the MVME197SP version has only one MC88110/

MC88410 device combination), 1MB of flash memory, 8KB of static RAM (with

battery backup), a time of day clock (with battery backup), an Ethernet

transceiver interface, four serial ports with EIA-232-D interface, six tick timers,

a watchdog timer, 128/256KB of BOOT ROM, a SCSI bus interface with DMA

(Direct Memory Access), a Centronics printer port, an A16/A24/A32/D8/

D16/D32 VMEbus master/slave interface, and a VMEbus system controller.

Input/Output (I/O) signals are routed through the MVME197’s backplane

connector P2. A P2 Adapter Board or LCP2 Adapter board routes the signals

and grounds from connector P2 to an MVME712 series transition module. The

MVME197 supports the MVME712M, MVME712A, MVME712AM, and

MVME712B transition boards (referred to here as the MVME712X, unless

separately specified). The MVME197 also supports the MVME712-12 and

MVME712-13 (referred to as the MVME712-XX, unless separately specified).

These transition boards provide configuration headers, serial port drivers, and

industry standard connectors for the I/O devices.

The MVME197 modules have eight ASIC devices (described in the following

order: BusSwitch, DCAM, ECDM, PCC2, and VME2).

Note

For the MVME197 series, the term Local Bus, as used in

other MVME1xx Single Board Computer series, is referred

to as the Local Peripheral Bus.

The BusSwitch ASIC provides an interface between the processor bus

(MC88110/410 bus) and the local peripheral bus (MC68040 compatible bus).

Refer to the board specific MVME197 block diagram (Figure 1-1 and 1-2). It

provides bus arbitration for the MC88410 bus and serves as a seven level

interrupt handler. It has programmable map decoders for both busses, as well

as write post buffers on each, two tick timers, and four 32-bit general purpose

registers.

The DCAM (DRAM Controller and Address Multiplexer) ASIC provides the

address multiplexers and RAS/CAS/WRITE control for the DRAM as well as

data control for the ECDM.

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Motorola MVME712AM Installation Guide Page 18