Motorola Master Selection GuideProduct Literature and Technical Training 6.1–10
Motorola Technical Training Courses (continued)
PowerPC 6xx Family Microprocessor
Description: The MPC6xx is primarily targeted for the desk-
top marketplace. The PowerPC MPC6xx course is a four–
day course that details all publicly announced MPC6xx
implementations such as the MPC602, MPC603 and
MPC604. This course contains lectures, labs, and exercises.
Prerequisites: The student must have advanced micropro-
cessor and assembly language knowledge. An understanding
of memory management, multi–processing/master, and
cache concepts is also beneficial.
MPC505 PowerPC Microcontroller
Description: This is a three–day course in which the student
learns to design with the embedded PowerPC core, system
integration unit (SIU), and associated components of the
MPC505. The course consists of lectures and exercises.
Prerequisites: The student must have advanced micro-
processor and assembly language knowledge. PowerPC
experience is not required.
MPC821 PowerPC Integrated
Microcontroller
Description: This is a four–day course in which the student
learns to design with the MPC821, i.e. the embedded
PowerPC core, and the enhanced communications pro-
cessor module. The course will contain lectures, labs, and
exercises.
Prerequisites: The student must have advanced micro-
processor and assembly language knowledge. The first day
of this course is optional, intended for designers with no
PowerPC background.
MPC860 Power QUICC–QUad Integrated
Communication Controller
Description: This is a four–day course in which students
learn to design and write programs for the various chip submo-
dules. This includes the embedded PowerPC Core, the
RISC communication processor module (CPM), and system
integration unit. Labs are a major part of the learning process;
lectures and exercises are also a part of the course.
Prerequisites: To benefit most from the course, some S/W
and H/W understanding of the PowerPC RISC processor is
a requirement. However, if students do not have this
requirement, the first day is a must to attend. The first day will
cover PowerPC basics and fundamentals.
TPU Microcode
Description: The TPU Microcode course is a three–day
lab–intensive course in which the student learns how to write
microcode functions for the TPU. The course is approximately
50% lecture and exercises and 50% lab time.
Prerequisite: The student must have advanced micro-
processor experience.
ColdFire MCF5200
Description: This is a three–day course that covers the
ColdFire family of microprocessors. This “variable length’’
RISC MPU is contrasted with traditional RISC and CSIC
architectures, and the advantages of the ColdFire family are
highlighted.
The software portion of this course covers the programming
model, addressing modes, and instruction set. Code density,
exception processing and program examples are also
reviewed.
The hardware portion begins with the system integration
module (SIM). The SIM includes the external bus interface
and timing, chip select operation, DRAM controller, and
system protection features.
The hardware portion also covers in detail the on–board
debug module. The course will demonstrate to the student
how to debug application programs using the advanced
features of the background debug mode (BDM), including
real–time trace and hardware breakpoints.
This course also covers the other ColdFire family resources,
including on–chip caches, timers, uarts and the M–bus
interface.
Each hardware topic includes a lab session and an application
example is provided to insure the student has a clear under-
standing of the features of the ColdFire family.
Prerequisite: 32, 16 or 8–bit microprocessor/microcontroller
knowledge or design experience.
(56 pages)
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