Motorola MCP750 Specifications Page 341
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Index
Index-5
SV_ALLOC routine 9-18, 11-18
SV_BROADCAST routine 9-18
SV_DEALLOC routine 9-18, 11-22
SV_SIGNAL routine 9-18, 11-21
SV_WAIT routine 9-18, 11-19
SV_WAIT_SIG routine 9-18, 11-20
switch table entry points 2-8
synchronization issues 17-12
synchronization primitives 9-17-9-18, 11-3-11-4
synchronization tools 17-19
synchronization variables 9-18, 11-18
system buses 4-3, 5-3, 6-3, 7-4
system data structures 9-3
System file 2-12, 14-9, 15-4
system header files 2-12
T
timeout routine 9-19
timing and timeout routines 9-19
tools
busy-wait mutual exclusion 17-20
rescheduling control 17-20
synchronization 17-19
transfer width support 4-5, 5-5, 6-5, 7-7
TRYLOCK routine 9-17, 11-8
U
udbuffree routine 17-17
uderror routine 17-18
uio structure 9-7
uiomove routine 9-16
uistat command 17-15, 17-22
_unload routine 13-5
UNLOCK routine 9-17, 11-8
untimeout routine 9-19
ureadc routine 9-16
userbufalloc routine 17-16
userdma system call 17-15, 17-36
User-level driver
DR11W 17-30
user-level driver 17-1
advantages 17-2
control functions 17-30
data structures 17-5
device configuration program 17-14, 17-38
disadvantages 17-2
error returns 17-13
I/O buffer 17-7
interrupt service routine 17-34
interrupt support 17-4, 17-11
multi-user 17-4
operating system support 17-15
polling support 17-11
routines 17-9
shared memory regions 17-6, 17-39
single-user 17-4
synchronization issues 17-12
user-level interrupt
process creation 17-40
user-level interrupt process 17-34
User-level interrupt routines
Using local memory 17-37
user-level interrupt routines 17-22
user-level interrupt utility 17-22
userr-level driver
polling support 17-4
uwritec routine 9-16
V
VME addressing 5-5, 6-4
vme_address routine 17-23
vtop routine 9-16, 12-3
W
wrapper
code for a loadable module 13-5
data structures 13-6
functions 13-5
macros 13-6
write routine 10-16, 15-5
- Device Driver Programming 1
- Syntax Notation 4
- Referenced Publications 4
- Contents 7
- Introduction 17
- Organization of Manual 1 20
- Supporting Documentation 1 21
- Understanding Device Drivers 23
- Structure 2 26
- Parallel Execution 2 27
- Interrupts 2 27
- Types of Devices 2 29
- STREAMS Interface 2 30
- Major and Minor Numbers 2 31
- Driver Environment 2 34
- • Master 35
- • System 35
- Master File 2 35
- Driver Development 2 36
- The PCI Environment 37
- Big Vs Little Endian Issues 3 40
- Types of PCI Resources 3 41
- Base Address Registers(BAR) 3 42
- PowerMax OS Support 3 43
- System Overview 4 49
- Caches 4 50
- Memory 4 51
- Data Types 4 51
- (H)VME Addressing 4 52
- Transfer Width Support 4 53
- Address Types 4 53
- Address Modifiers 4 53
- HVME Address Ranges 4 54
- VME Address Ranges 4 54
- Bus Time-Out 4 56
- Bus Arbitration 4 57
- • Straight priority 58
- • CPU Release on Request 58
- Interrupt Lines (Levels) 4 59
- • jumpers or switches 60
- System Overview 5 65
- Caches 5 66
- Memory 5 67
- Timers 5 67
- Interrupts 5 67
- Data Types 5 68
- Byte-Ordering and Alignment 5 68
- VME Addressing 5 69
- Address Modifiers 5 70
- VME Address Ranges 5 70
- Bus Time-Out 5 71
- • Invalid transfer 72
- Bus Arbitration 5 73
- Interrupt Lines (Levels) 5 74
- VME to PCI Address Decode 5 76
- System Overview 6 79
- Caches 6 80
- Memory 6 81
- Data Types 6 81
- VME Addressing 6 82
- Transfer Width Support 6 83
- Address Types 6 83
- Address Modifiers 6 83
- VME Address Ranges 6 83
- VME Devices as Bus Masters 6 84
- Bus Time-Out 6 85
- Bus Arbitration 6 87
- Interrupt Lines (Levels) 6 88
- System Overview 7 93
- Processor Board 7 96
- Memory 7 96
- Timers 7 97
- Interrupts 7 97
- Data Types 7 97
- Byte-Ordering and Alignment 7 98
- VME Addressing 7 99
- VME Address Ranges 7 100
- Bus Time-Out 7 101
- Bus Arbitration 7 102
- Bus Request Levels 7 103
- Interrupt Lines (Levels) 7 103
- PCI Address Decode 7 105
- 0xC0000000 106
- 0xFCC00000 106
- 0xFCFF0000 106
- 0x80000000 106
- 0xA0000000 106
- SYSTEM OVERVIEW 8 109
- PROCESSOR BOARD 8 109
- MEMORY 8 110
- BUSSES 8 112
- TIMERS 8 112
- INTERRUPTS 8 112
- DATA TYPES 8 113
- BYTE-ORDERING AND ALIGNMENT 8 113
- System Data Structures 9 123
- Header Files 9 124
- The cdevsw Structure 9 125
- The cred Structure 9 127
- The adapter Structure 9 129
- Kernel Support Routines 9 132
- BREAK signal.) 133
- Memory Access Routines 9 135
- Address Management Routines 9 135
- Data Transfer Routines 9 136
- Synchronization Routines 9 137
- Sleep Locks 9 138
- Timing and Timeout Routines 9 139
- Interrupt Vector Routines 9 140
- Debug Routines 9 141
- Developing a Device Driver 145
- Device Registers 10 148
- Command Sequences 10 148
- DMA Support 10 148
- Programmed I/O Support 10 149
- Data Chaining Support 10 149
- Installing the Device 10 150
- Initialization Routines 10 153
- I/O Service Routines 10 153
- Interrupt Service Routines 10 153
- The Init Routine 10 155
- The Open Routine 10 157
- • Enable device interrupts 158
- • Lock a non-sharable device 158
- The Close Routine 10 159
- The Read Routine 10 160
- /* number of bytes to copy */ 161
- The Write Routine 10 162
- The Ioctl Routine 10 163
- The Chpoll Routine 10 164
- • 0 if the poll is successful 164
- The Mmap Routine 10 165
- Local Routines 10 168
- Error Handling 10 169
- Protecting a Device Driver 11 175
- • Global variables 176
- • Hardware registers 176
- • _LOCKTEST 178
- • _MPSTAT 178
- Spin Locks 11 179
- Basic Locks 11 180
- NULL pointer 181
- Read/Write Locks 11 183
- Sleep Locks 11 187
- LWP that suc 191
- Using Multiple Locks 11 192
- Synchronization Variables 11 192
- LWP upon 194
- LWP which is in 194
- LWP goes to sleep. No spin 194
- LWPs are sleeping on 196
- LWPswake 196
- Overview 12 199
- DMA into User Buffers 12 199
- 24-Bit DMA Devices 12 203
- Loadable Modules 205
- The DLM Mechanism 13 208
- Demand Load 13 209
- Auto Load 13 209
- Demand Unload 13 210
- Auto Unload 13 210
- Making Modules Loadable 13 211
- Wrapper Data Structures 13 212
- Wrapper Macros 13 212
- Sample Wrapper Code 13 213
- Managing Loadable Modules 13 218
- Unloading the Module 13 220
- DLM Error Messages 13 220
- Dynamic Symbols and kdb 13 220
- Using idtools 14 223
- Overview of DSP Components 14 229
- DSP Component Files 14 230
- Driver.o 14 231
- Master 14 231
- System 14 231
- $version 1 232
- $loadable gt 232
- Mtune 14 233
- Sassign 14 235
- Space.c 14 236
- Packaging the Driver 14 237
- Installing a Package 14 240
- Removing a Package 14 241
- Installing a DSP 14 241
- Updating a DSP 14 242
- Removing a DSP 14 242
- Building a New Kernel 14 243
- Driver Testing and Debugging 245
- General Guidelines 15 248
- Common Driver Problems 15 251
- Timing Errors 15 252
- Corrupted Interrupt Stack 15 252
- Accessing Critical Data 15 252
- Booting Scenarios 15 255
- Shutdown and Reboot 15 255
- Using crash Functions 15 263
- Kernel Debugger 15 264
- Entering kdb from a Driver 15 265
- System Panics 15 265
- Special Considerations 267
- Additional Considerations 16 272
- System Requirements 16 272
- P_PLOCK 278
- Shared Memory Regions 17 282
- User I/O Buffer Descriptor 17 283
- Overview of Error Returns 17 289
- Driver 17 291
- The spl Support Routines 17 295
- Rescheduling Control Tools 17 296
- The Server System Calls 17 297
- The open Routine 17 299
- The aread Routine 17 302
- The awrite Routine 17 303
- The acheck Routine 17 304
- The await Routine 17 305
- Control Functions 17 306
- The close Routine 17 307
- Use of Local Memory 17 312
- MPA_CPU_VMELEV command; 313
- P_SHMBIND 315
- Reset the Device 17 316
- Debugging the Driver 17 317
- Glossary 325
- Glossary-12 336
- I/O 10-7 338
- STREAMS interface 2-6 338
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