Motorola M6800 User Manual download pdf (Page 13)

MPU-13

Hardware Interrupts

What happens when the MPU gets a hardware interrupt? After it has been

determined that the interrupt is not non-maskable, the MPU checks the status

of the mask bit (bit 4 of the condition code register). If the mask bit is

set, the main program continues until a CLI (clears bit 4 of condition code

interrupt by going to the stack pointer (SP) register and fetch an address

which will be the 1st address in RAM where the status of the MPU registers

will be stored during servicing of the interrupt.

SP : contents of program counter low

SP-1 : contents of program counter high

SP-2 : contents of index register low

SP-3 : contents of index register high

SP-4 : contents of accumulator A

SP-5 : contents of accumulator B

SP-6 : contents of condition code register

The address in the stack pointer register is determined by the

programmer.

After the contents of the MPU registers have been stored in the stack,

the mask bit is set thus preventing any further interrupts from interfering

with the MPU until the program executes a CLI instruction. Next the MPU

hardware automatically looks at addresses FFF8(MS) & FFF9 (LS) for the

address of the poling routine to find out where the interrupt came from and

what action to take.

After the interrupt has been serviced and an RTI instruction is

executed, the stack, which contains the status of the registers before the

interrupt, is unloaded in reverse order, i.e. the condition code register is

loaded first, then accumulator B is restored, etc. When the registers have

been restored to their status before the interrupt, the processor continues

as though nothing happened.

The total story of interrupts is shown on the next two pages in the

form of flow charts.

1 ... 12 13 14 ... 29

No comments

Motorola M6800 User Manual Page 13