Motorola A008 Service Manual download pdf (Page 40)

RX SIGNAL PATH

TX SIGNAL PATH

MAIN VCO SIGNAL PATH

TUNING VOLTAGES

REFERENCE CLOCK

Orderable Part

Non - Orderable Part

U900

U702

U701

G_CAP2

SRAM

EEPROM

J 600

15 PIN EXT CONN.

SPKR

MIC

DATA BUS

ADDRESS BUS

H6

H7

H9

SENSE

CNTL.

MAN_TEST_AD

DSC_EN_AD

DOWNLINK_AD

BATT_THERM

ISENSE

A1

B2

A2

B3

D9

REAL TIME

CLOCK

Y900

A7

B7

32.768 KHz

SPR-

SPR+

REG.

V2

REG.

V3

REG.

VBOOST1

REG.

L901

B+

V_BOOST1

LS_V1

V2

V3

VREF

REG.

VREF

2.775V, for WhiteCap logic outputs, RAM, FLASH, EEPROM

1,8V, for WhiteCap

VSIM

REG.

VSIM1

V1

5.0V, for DSC Bus, Negative Voltage Regulator

Internal GCap use only (VSIM1, LS_V1)

3.0 or 5.0V, for SIM Card Circuit

PA_DRV

RESET

2.775V,for MAGIC

K5

B10

J5

C6

B5

G9

A6

A10, C10

F7

C7

SENSE

BATT+

EXT_B+

14

1

3

10

5

7

6

DSC_EN

12

11

UPLINK

DOWNLINK

15

GND

GND

GND

GND

RX_ACQ

RX_EN

TX_KEY

DM_CS

TX_EN

CLK_SELCT

RESET

MAGIC_13MHz

GCLK

A1

C1

E2

E1

E3

E4

BKLT_EN

DP_EN

HS_INT

KBR0, KBR1, KBR2

KBC0, KBC1, KBC2, KBC3

( Keyboard )

CLK

RST

SIM_I/O

VSIM1

2

6

4

1

5

LEVEL

B+

E10

CNTL

DEEP SLEEP

P2

( for RS232 )

( Ext Accessory Sense)

PWR_SW

C8

LS1_IN

LS2_IN

LS3_TX

LS3_RX

K7

G6

K10

LS1_IN

LS2_IN

LS3_TX

LS3_RXH8

J900

SIM

Con.

SHIFT

( SDTX ) BDX

( TX_CLK ) BCLKX

from / to MAGIC

( SCLK_OUT ) BCLKR

( SDFS ) BFSR

( SDRX ) BDR

STDBY

CIRCUIT

LS_V1

V1

U700

WHITE_CAP

K2

SPI

INTERFACE

TIMER

SPI

INTERFACE

K5 G14

K2

P4

E10

H2, H3, H1

K1, J4, J3, J2

UART

INTERF.

M

E

M

O

R

Y

I

N

T

E

R

F

A

C

E

E8

D6

E1

E6

SIM

INTER

FACE

CTM

MODULE

DSC

SERIAL

INTER

FACE

DSP

CHARGE

A / D

CTM

CPU

C6

A2

A3

B4

C4

F3

V2

V3

C14, D4, E12, H4, J10, K6, N12

B5, B9, B10, G12, K14, L11, N8

J2

Q938

Q938

BKLT_EN

BKLT+

CR901

F6

J8

J7

Logic Control

AUDIO SPI

GCAP SPI

D2

C3

EPROM

D6

U801

VIB_EN

B+

1

5

4

Q805

Q805LED_RED

LED_GRN

1

2

3

4

5

6

V2

( GCAP2 )

( WhiteCap )

( WhiteCap )

V2

V2

CE0

CE1

CE2

CE3

R_W

( SPI_DATA ) DX1

( SPI_CLK ) MOSPI_CLK1

( CE ) MQSPI_CS1

( MAGIC SPI )

M7

M8

L8

D6, E1

B2

A1

G6

A4, A6, F6

D7

F8

C9

E9

D11

D9

A9

STDBY

G4C4

M4

RESET

B4

E3

E2

D2

E4

F5

C3

( Flip Con. )

R_W

( Flip Con. )

K4

VIB_EN

KEYPAD

INTERFACE

DISPLAY

LED_RED

LED_GRN

M3

M2

LS_V1

N6

-5V

GCAP_CLK

13 MHz

D7

F5

-5V_EN

EXT_B+

SELECT

U901

5

2

1

HEAD_INT

N3

H3

Audio

Codec

Interface

SPI

INTERFACE

GLOBAL GSM SERVICE SUPPORT 15.01.01

LEVEL 3 AL Block Diagram Rev. 1.1

TAI CHI PLUS ORGANISER

Ralf Lorenzen, Michael Hansen, Ray Collins Page 2

TAI CHI + ORGANISEER

LX

Baseband

to Digital

Speech

2

SW_RF

BATT FDBK 4

PC_RXD

PC_TXD

8

G5

9On/Off

13

EXT B+

Q901

Q9819

CR940

B+

Q942

BATT +

R932

Q932

D9

I SENSE

CR932

BATT +

Q634

CHRG_EN

CHRGC

E8

BATT FDBK

PRESENCE DETECT

A4

J9833

J910

H2

U980

HEADSET

J504

ALRT_VCC

TO PDA

VS944

CR920

ON / OFF

(From Switch)

HOME

PAGE UP

PAGE DOWN

POWER ON / OFF

KBC0

KBR0

KBR1

PWR_SW

VA

KBR0

Jog Switch

CWCCW

KBC1 KBR2

J810

BATT CONNECTOR

J611

J613

J614

J612

J610

BATT +

BATT_SER_DATA

N/C

GND

To PDA

From PDA

A6D5

UTXD URXD

To / From PDA

RTC BATT

J9844

To PDA

Q803

V2

Q911

Q912

V1

DSC_EN_AD

From PDA

GCAP UPLINK

GCAP_DOWNLINK

LS_V1

LS_V1

DOWNLINK_AD

Q628

V2

STBY

U950

BATT_+

BOOM_PWR

HEAD_INT

(SIM_TX)

(SIM_RX)

Q920

V1

B+

Q9808

Q902

V2 & VREF Grounded

J811

DSC_TXDDSC_RXD

F4

G1

DSC_TXD

DSC_RXD

C2

C1

SR_VCC

E1 & D6

SR_VCC

E1

SR_CS

L2

PB2

THERM

V2

R627

BATT_THERM

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